/* SPDX-License-Identifier: GPL-2.0 */
/*
 *
 * Copyright (C) 2016-2018, LomboTech Co.Ltd.
 * Authors:
 *	lomboswer <lomboswer@lombotech.com>
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

#ifndef __CSP_VGSS_TOP_H__
#define __CSP_VGSS_TOP_H__

#include <linux/types.h>

#define VGSS_CLK_PARENT_MAX	2
#define VGSS_CLK_DIV_MAX	16
#define VGSS_ADPLL_NUM		1

#define VGSS_ADPLL_STATUS_MASK_FERR	(0x1FF << 0)
#define VGSS_ADPLL_STATUS_MASK_FLOCK	(0x1 << 15)
#define VGSS_ADPLL_STATUS_MASK_PERR	(0x7F << 16)
#define VGSS_ADPLL_STATUS_MASK_PLOCK	((u32)0x1 << 31)

#define VGSS_SCLK_PARENT_EXT   0x0
#define VGSS_SCLK_PARENT_ADPLL 0x1

#define VGSS_SCLK_ADPLL_N_MIN	10
#define VGSS_SCLK_ADPLL_N_MAX	84

typedef enum tag_vgss_mod_t {
	VGSS_MOD_G2D,
	VGSS_MOD_ROT,
	VGSS_MOD_DIT,
	VGSS_MOD_CQI,
	VGSS_MOD_GDC,
	VGSS_MOD_ABT,
	VGSS_MOD_SUB_MAX,
	VGSS_MOD_ADPLL0 = 0xc,
	VGSS_MOD_TIMER = 0xd,
	VGSS_MOD_TOP = 0xe,
} vgss_mod;

/* config of adpll enable */
struct vgss_adpll_config {
	u32 n; /* pll n factor, must be >= 10 */
	u32 tune0;
	u32 tune1;
};

s32 csp_vgss_set_register_base(unsigned long base);
s32 csp_vgss_get_register_base(unsigned long *addr);
s32 csp_vgss_set_udelay_func(void (*udelay)(unsigned long));
/* csp_vgss_clk_assert - reset the specified clk */
s32 csp_vgss_clk_assert(u32 id);
/* csp_vgss_clk_deassert - release the specified clk(normal work state) */
s32 csp_vgss_clk_deassert(u32 id);
/*
 * csp_vgss_clk_set_parent - set parent
 * @id: module id
 * @parent: clk index of parent clk
 */
s32 csp_vgss_clk_set_parent(u32 id, u32 parent);
s32 csp_vgss_clk_get_parent(u32 id, u32 *parent);

/*
 * csp_vgss_clk_set_divider - set clk divider
 * @div: divider, [1, 16]
 */
s32 csp_vgss_clk_set_divider(u32 id, u32 div);
s32 csp_vgss_clk_get_divider(u32 id, u32 *div);

/* csp_vgss_clk_enable - enable sub module clk gating */
s32 csp_vgss_clk_enable(u32 id);
s32 csp_vgss_clk_disable(u32 id);

s32 csp_vgss_adpll_enable(struct vgss_adpll_config *cfg);
s32 csp_vgss_adpll_disable(void);
u32 csp_vgss_adpll_get_status(void);

s32 csp_vgss_top_set_legal_start_addr(u64 addr);
s32 csp_vgss_top_set_legal_end_addr(u64 addr);
u32 csp_vgss_top_read_illegal_read_ID(u32 *ilg_id);
u32 csp_vgss_top_read_illegal_write_ID(u32 *ilg_id);

#endif /* __CSP_VGSS_TOP_H__ */
